Mips subtraction of 64 bit numbers

I'm asked to implement subtraction for 64 bit numbers in Mips, whereby the numbers are given in 2's complement, and the lower/upper 32 bits are stored in different registers. My thoughts: We first subtract the lower parts and then the upper ones. A "problematic" situation occurs if the lower part number of the first number is smaller than that of the second number, i.e. considering a small example where we only have 4 bit registers

 0110 0011 
-0010 1000 

so first the lower part

 0000 0011    0000 0011
-0000 1000 = +1111 1000 = 1111 1011

and then the upper part

 0110 0000    0110 0000
-0010 0000 = +1110 0000 = 0100 0000

and then adding the two parts together

 0100 0000
+1111 1011 = 0011 1011

My Mips implementation would then look something like this (registers 1-8 for simplicity):

// A-B
lw  $1, 0($8) // upper part of A
lw  $2, 4($8) // lower part of A
lw  $3, 8($8) // upper part of B
lw  $4, 12($8) // lower part of B

subu $5, $2, $4
stlu $6, $2, $4 // if lower part of A < lower part of B we need to add 1111 0000 i.e. 
                // subtract 1 from upper part result
subu $7, $1, $3
subu $7, $7, $6

// Now the upper part of the result is stored in $7$ and the lower part in $5

Does my idea seem correct?



Read more here: https://stackoverflow.com/questions/68467093/mips-subtraction-of-64-bit-numbers

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